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Seminar: Hardware Cybersecurity
November 9, 2018 @ 3:30 pm - 5:00 pm
In the first part of this talk I will address the security and vulnerability challenges in the horizontal integrated hardware development process. I will then present the concept of hybrid spin-transfer torque CMOS look up table based design which is our latest effort on developing a cost-effective solution to prevent physical reverse engineering attacks. In the second part of my talk I will present how information at the hardware level can be used to address some of the major challenges of software security vulnerabilities monitoring and detection methods. I will first discuss these challenges and will then show how the use of data at the hardware architecture level in combination with an effective machine learning based predictor helps protecting systems against various classes of hardware vulnerability attacks. I will conclude the talk by emphasizing the importance of this emerging area and proposing a research agenda for the future.